Elect Design and Analy Engr 3

Company: The Judge Group
Location: El Segundo
Posted on: April 18, 2024

Job Description:

Our client is currently seeking a Elect Design and Analy Engr 3
Duration: 6 months (Manager highly likely to consider extending contract or converting the right candidate in future.)
Work Location: El Segundo CA 90245
Onsite
Job Description:
Title: ASIC/FPGA Design Verification Engineer with UVM Experience
Create UVM simulation plan from design specification. Create or modify UVC, Score Board, Monitor, and test cases.
Verify until functional coverage and code coverage meet project threshold. Document results.
Required Skills:
--- 5+ years of experience
--- 1-2 years of UVM tool
--- Cadence Xcelium verification toolEducation:
Must have min Bachelor's in Engineering (no exception, please do not submit candidates without)
Additional Details: Must have min 5 years of experience, please do not submit without, manager will reject (he's interviews are thorough and so is his resume review, please thorough screen candidates).
UVM experience is important and required. Manager highly likely to consider extending contract or converting the right candidate in future.

Keywords: The Judge Group, Oxnard , Elect Design and Analy Engr 3, Other , El Segundo, California